Field of Invention
The present invention is related generally to a power converter and, more particularly, to a compensation circuit and method for a power converter.
Description of Related Art
A feedback loop of a power converter needs a compensation circuit to compensate the phase margin for stability of the feedback loop. Conventional analog compensation circuits include an EA type compensation circuit 10 as shown in FIG. 1 or a gm type compensation circuit 14 as shown in FIG. 2. Referring to FIG. 1, the EA type compensation circuit 10 includes an error amplifier 12, a capacitor C1 and a resistor R3 serially connected between an inverting input terminal and an output terminal of the error amplifier 12, and a resistor R4 parallel connected with the serially connected capacitor C1 and resistor R3. The error amplifier 12 amplifies the difference between a feedback signal Vfb and a reference signal Vref to generate a signal Vcomp which is then provided to a power converter to stabilize the output voltage Vo of the power converter. The resistors R3 and R4 and the capacitor C1 are configured to compensate the signal Vcomp. Some applications may not include the resistor R4 shown in FIG. 1. Referring to FIG. 2, the gm type compensation circuit 14 includes a transconductance amplifier 16, a resistor R3 and a capacitor C1 serially connected between an output terminal of the transconductance amplifier 16 and a ground terminal GND, and a capacitor C2 parallel connected with the serially connected resistor R3 and capacitor C1. The transconductance amplifier 16 converts the difference between a feedback signal Vfb and a reference signal Vref into a current Icomp. The resistor R3 and the capacitors C1 and C2 are configured to generate a compensation signal Vcomp according to the current Icomp. For a control integrated circuit (IC), using an external compensation circuit requires a pin of the control IC. In order to reduce the number of the pins of a control IC, more and more solutions integrate a compensation circuit into a control IC, for example, U.S. Pat. No. 7,504,888. Generally speaking, the gm type compensation circuit 14 is easier to be integrated into a control IC, while this type of solutions also has many limitations. Generally, a control IC for a high switching frequency DC/DC power converter has a pole and a zero point that are both higher than 10 KHz, so it is easier to integrate the compensation circuit into the control IC. However, in low-bandwidth applications such as power factor correction (PFC) power converters or other similar PFC control ICs or power converters, the compensation circuit 14 requires large capacitors C1 and C2. Under consideration of costs and chip area, it is much difficult to integrate the large capacitors C1 and C2 into the control IC completely. More specifically, the input voltage of a PFC power converter is an alternating-current (AC) voltage with an AC frequency of 60 Hz, so a control IC needs a low gain and a pole and a zero point of a low frequency to achieve a low-bandwidth loop to filter out the AC frequency. Therefore, the compensation circuit 14 requires large capacitors C1 and C2 for compensation to make the signal Vcomp vary slowly so as to filter out the AC frequency. However, the large capacitors C1 and C2 satisfying the requirements cannot be implemented in a control IC, the control IC is required a pin to be connected to external large capacitors C1 and C2. If it is desired to shrink the capacitors C1 and C2 so that they can be integrated into a control IC, then it needs the current Icomp to be reduced to the nanoampere level or the picoampere level; however, such a small current is much sensitive to the process and cannot be controlled accurately, so it is difficult to integrate the large capacitors C1 and C2 into a control IC.
Since it is difficult to integrate an analog compensation circuit into a control IC, many digital compensation circuits are proposed, for example, U.S. Pat. Nos. 7,743,266 and 7,894,218. Although these digital compensation circuits can be integrated into the control IC of a PFC power converter, usually a complex digital signal processing (DSP) algorithm is needed and thus a large chip area is required, resulting in increased costs and chip size. On the other hand, the slowly varying signal Vcomp will make a power converter unable to rapidly respond to a load transient, resulting in a large voltage drop or overshoot of the output voltage Vo.